Typically, integrated circuits are manufactured from semiconductor wafers that are conventionally round in shape and made of thin, brittle substrates. Additionally, wafers may be lapped, resulting in further thinning of the wafers. Traditionally, during the processing, storage, and shipping of semiconductor wafers the wafers are supported and constrained at their edges to prevent any contact and possible damage and contamination to the faces of the wafers having the circuits thereon. The trend towards larger, more dense and thinner wafers, has resulted in the wafers becoming more valuable, more brittle, more easily damaged during shipment. Although it is possible to ship thicker wafers in enclosed containers that would support the wafers exclusively by their edges, using such devices to ship these thinner wafers has proven problematic due to breakage and damage of the wafers. Thus for these more fragile wafers, containers are utilized in which the wafers are stacked on top of one another and separated by layers of paper-like flexible sheet material or rigid support rings. In these “horizontal” wafer containers, each wafer is typically supported by adjacent wafers. Furthermore, foam materials, such as urethane and closed-cell polyethylene, are commonly used to cushion the top and bottom of the stack.
Horizontal wafer containers for shipping stacks of wafers are typically designed for shipment of a fixed number of wafers. As a result, when it is necessary to ship less wafers than the container was designed for, the container is typically filled with additional inserts to fill the volume of the container and to secure the reduced number of wafers. However, this type of packing methodology can increase the usage rate of packing materials and thus the costs for packing the wafers. Furthermore, the resulting packing procedure is typically inefficient as a longer amount of time is necessary to determine and stack the needed number of inserts into the container. In addition, such inserts may move during shipping and cause wafer damage.